Reconfigurable compiler system-RCOSY (DES.6392)

RESEARCH
A recent and increasingly popular trend in industry is the use of reconfigurable processing units (RPU) in embedded or general purpose processing systems. There are many reasons that explain the popularity of this particular technology. First, it allows for a wide variety of functional behaviour that can be dynamically configured in real time. Secondly, it provides the designer-manufacturer with additional instruments to optimise a number of (cost) parameters such as energy consumption, silicon area. Third, it provides massive parallel computing power.
Reconfigurable hardware co-existing with a core processor has been proposed as a good candidate for speeding up processor performance. Such an approach can be very promising; however, the organization of such a hybrid processor can be viewed mostly as an open topic.

OBJECTIVE
In this project, we propose to develop a semi-automatic tool to assist the designer in determining what functions should be considered for reconfigurable or mixed system implementation. This tool will be integrated in the COSY COMPILER SYSTEM of the company ACE. We will integrate useful existing tools and develop novel approaches to improve the identification process. We intend to develop a high-level to high-level restructuring compiler that will consider input programs written in a high level language and will generate an annotated program with augmentations and instrumentations to provide information for reconfigurable computing. Using this information, we will construct a cost model that allows to make performance predictions based on a set of design parameters.

CONTEXT
The Molen Programming Paradigm, developed at the CE laboratory in collaboration with other Dutch research groups, will be used allowing a smooth integration of reconfigurable computing units in traditional uni-processor machines. The Molen Programming Paradigm consists of an extension of the instruction set with a "SET" and "EXECUTE" instruction to separate the context setting from the actual execution phase.

UTILISATION
Despite the economic climate, innovation in the technology of embedded processors is as strong as ever. Consumer appliances such as mobile phones, digital cameras and home office appliances push this. The need for high performance, low power processing spurs application developers into highly parallel and more specialized processor architectures. At the same time, the increasingly high cost of ASIC (custom built chip) design and implementation, forces developers to use generic devices. The two forces combined explain the advent of highly parallel reconfigurable architectures in embedded processing.

Even today, assembly level programming is still an accepted practice in the development of embedded applications. With the reconfigurable devices that are now designed this becomes less and less feasible. Architecture exploration at a high level will be required to achieve the best possible performance. Moreover, the time to market requirements demand strong tool support to get from prototype to product quickly.

It is imperative for ACE that CoSy supports reconfigurable architectures and provides the tools to program them in order to maintain its position in the embedded market. As CoSy has done in the area of DSP programming, it must bridge the gap between application and architecture. Compilation techniques specific for reconfigurable architectures must be added to CoSy. This proposal focuses on the identification of computational intensive application kernels that can be mapped to the reconfigurable target. This is an essential ingredient for successful compilation to these targets. Due to the limitation of resources in reconfigurable processors and the many trade-offs that are to be made, finding an optimal balance is the key to success in this area.

ACE expects the results of this project to be directly applicable to CoSy. If at all possible, ACE will consider the integration of actual parts of the implementation into CoSy. Even though it is known that there is often a significant gap between a research prototype and a product, the modular nature of CoSy makes such integration more likely than with alternative technologies.

ACE has a strong background of cooperation with universities and other research groups and, closely related to this, incorporating results from research in its products. ACE was the project leader in the ESPRIT projects Compare and Prepare, which culminated in the development of the CoSy product. The CE laboratory also has a long tradition of bringing research results into industrial practice of which the number of patents and the 12 start-ups that emanated from the group are the best proof.

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