Reliable RF, Robust RF Power-Drivers in low-voltage CMOS technology (TCS.6015)

Summary of the research proposal
The modern consumer is obtaining more and more electronic equipment that has to communicate wirelessly with other devices at ever higher communication speeds. Examples for this include GSM, Bluetooth, DECT, WLAN, and GPRS. All these wireless communication devices require radio-frequency (RF) power amplifiers to send data, via their antennas, to receiver devices.
Radio Frequency power amplifiers are required to deliver a high-power and high-voltage signal to the antenna. These power amplifiers are typically realized in dedicated and hence expensive technologies. For cost reasons it is attractive to realize all circuits, including power amplifiers, in the mainstream low-cost IC-technology: CMOS. Another advantage of realization in CMOS is that it opens the door to integration of RF systems on a single chip.
The majority of problems with the integration of RF power amplifiers in CMOS is due to the fact that mainstream CMOS is optimised for low power and low voltage, while power amplifiers operate at high power and high voltages. In this context "high voltage" and "high power" is relative to normal operating levels for nowadays CMOS ICs, and may amount to 10V and a few Watts respectively. As comparison, normal voltage and power levels in CMOS ICs are around 1.8V and up to several milli-Watts.
Operating CMOS electronic components at high voltages or power levels results in excessive wear out. The resulting degradation of transistors leads to signal distortion and ultimately to loss of connection. The lack of knowledge on this RF transistor degradation is forcing designers to sub-optimum designs and towards expensive and power-inefficient IC solutions, thereby forming one of the main bottlenecks for companies to designing and producing CMOS power amplifiers. Where others typically seek solutions in overly robust and hence expensive designs, we propose to acquire knowledge on the physics of RF degradation mechanisms and to fully utilize this knowledge to design efficient and robust RF power systems in CMOS.
One part of the project deals with research into the physics of RF degradation mechanisms and their modelling for circuit simulation. The second part deals with circuit and system design to fully utilize the RF-degradation knowledge as to design the robust and cost-efficient RF power circuits in CMOS. Considering the amount of work to be done and the multidisciplinary nature of the project, two Ph.D. students are planned. As the proposed research is probably too fundamental to be dealt with by companies, while it fits to existing areas of expertise and existing industrial contacts in the applicants' groups, the project is well suited to be carried out in the applicants' groups.

Summary of the utilization plan
There is a clear trend towards a higher degree of integration of electronic functions, because of cost-efficiency, power-efficiency and portability reasons. One of the main bottlenecks is the integration of power RF circuits, because of both reliability and power efficiency issues. The results of this project will include degradation models for MOS transistors under RF-conditions, their incorporation in existing state-of-the-art circuit simulators, circuit and system architectures that inherently limit degradations, and signal-shaping circuits to minimize RF-degradation of transistors. Combined they allow the design of reliable RF power circuits in CMOS that operate close to the physical limits, thereby achieving maximum performance at minimum cost. This will enhance the probability that for RF interfacing, inexpensive CMOS silicon can be used instead of expensive silicon BJT's or even GaAs MESFET's. As a direct result, existing wireless applications get less expensive and smaller and new wireless applications will become feasible. For end-users this translates in more performance of products with lower size and weight and with lower power consumption (i.e. longer operation time for handheld equipment).
The utilization will be maximized by ensuring that potential users participate in the user committee from the very beginning. Philips Semiconductors, National Semiconductors and Philips Research, who are all active players in the RF business, already indicated that they have a strong interest in the project, as can be seen from the letters of recommendation. The expertise of RF degradation and the circuit techniques developed in this project can be used to circumvent one of the main bottlenecks for a higher integration level for nowadays wireless equipment. This can contribute to maintain and improve the position of Dutch industry in the huge semiconductor market, a market that increasingly depends on wireless communication. Thus the application potential of the models and techniques developed in this project is very high, especially as we use mainstream standard CMOS IC-technologies that are directly industrially available.

Er zijn zes bedrijven en één andere universiteit bij dit project betrokken.