Home > Projecten > Universiteit Twente > Embedded Systemen (PROGRESS) >
Jaarcongres 2011
Nieuws
Agenda
Over STW
Folder STW
Kennisexploitatie
Praktijkvoorbeelden
Logos
Organisatie
Adres en routebeschrijving
Jaarverslagen
Utilisatierapporten
Address and route description
English brochure
STW publicaties
Infobalie
Algemeen
Aanvragers
Referenten en Juryleden
Projectleiders
Gebruikers
Projecten
Programma's
Vacatures
Links
English
Login
Contact

High-level Synthesis Tools for High-throughput Digital Signal Processing Applications (High2) (TES.5226)

Project nummer: tes5226

Omschrijving van het onderzoek

Important classes of embedded systems are systems for digital signal processing, DSP, in which algorithms are applied to streams of signals. The variety of these algorithms is large and encompasses algorithms for filtering audio and video signals, algorithms for error-correction, compression, picture-in-picture, etcetera. Modern multi-media systems could not exist without this kind of embedded systems. The algorithms are all characterized by a repeated application of some functions on a stream of input values, resulting in a stream of output values.

Important parameters from the application domain which strongly influence the synthesis method are the throughput and the synchronicity. This proposal is focussed on high-throughput applications. With high-throughput only less than 100 time steps are available for executing a function once.

Real-time constraints play a crucial role in the design of high-throughput DSP applications. The available hardware must be able to perform the specified function at any time and with a sufficient small latency. In case the input is provided as a synchronous stream of equally sized blocks and the control flow of the algorithm is not data dependent, currently, synthesis algorithms for high throughput applications are available which give (near) optimal schedules. These synthesis algorithms are based on integer linear programming. Unfortunately, if the input streams are not fully synchronous, or in case of data dependent control flow, no optimal synthesis algorithms are available. Scheduling and resource allocation in that case rely on heuristic algorithms.

A second problem of this kind of synthesis tools is that they are often only suitable for a parts of a design. So they have to cooperate with other synthesis tools. This poses additional requirement to the synthesis tool.

This proposal aims at diminishing these disadvantages of not being able to handle irregular input streams or data dependent control flow, without losing the advantage of being able to determine optimal schedules (by means of integer linear programming). Moreover we will investigate how such a synthesis tool needs to be adapted in order to fit into existing design flows.

Resultaten van het onderzoek

For results, see http://wwwhome.cs.utwente.nl/~krol/projects-current/High2.htm.

Gebruikers

Four companies are involved in this project.

Projectleider

Prof.dr.ir. Th. Krol Universiteit Twente
Elektrotechniek Wiskunde en Informatica
Vakgr. SPA
Postbus 217
7500 AE Enschede

Status van het project

Gestart: 01-10-2000
Einddatum: 01-03-2005

Trefwoorden

Embedded Systemen, Real-time, Signaal bewerking.

  Print | Over deze site |  Sitemap | Voorbehoud | Gewijzigd 7-3-2006
Nieuws uitgelicht
Nieuwsbrief Technologiestichting STW, januari 2012
31 januari 2012
Elke maand stuurt Technologiestichting STW haar relaties een link naar de web-based nieuwsbrief. Hierin staat een maandelijks overzicht van het jongste nieuws van de bestuurstafel, onderzoeksnieuws, o... [meer]